Google AMD is helping TSMC test 3D stack packaging technology
According to reports, Google and AMD are helping TSMC test and verify 3D stack packaging technology. This technology is expected to start mass production in 2022, and Google and AMD will become the first customers of TSMC's chip packaging technology.
According to sources, Google is planning to use 3D stack packaging technology to encapsulate chips needed for autonomous driving systems and other applications. Another source revealed that AMD, as a competitor of Intel's microprocessors, is eager to use the latest chip packaging technology to produce products that are stronger than Intel. The report also mentioned that TSMC is building a factory for 3D stack packaging technology, and the construction of the factory is expected to be completed next year.
The major foundries are constantly escalating the battle around advanced manufacturing processes, and advanced packaging has become a new battlefield. TSMC believes that the current 2D semiconductor scaling is no longer in line with the future heterogeneous integration needs, and its development of 3D semiconductor scaling has become a solution that can meet the future including system efficiency, reduction of area, and integration of different functions.
It is reported that TSMC’s 3D stack packaging technology can encapsulate different types of chips such as processors, memories, and sensors into one entity, which can make the chipset smaller, more powerful, and energy efficient.
According to sources, Google is planning to use 3D stack packaging technology to encapsulate chips needed for autonomous driving systems and other applications. Another source revealed that AMD, as a competitor of Intel's microprocessors, is eager to use the latest chip packaging technology to produce products that are stronger than Intel. The report also mentioned that TSMC is building a factory for 3D stack packaging technology, and the construction of the factory is expected to be completed next year.
The major foundries are constantly escalating the battle around advanced manufacturing processes, and advanced packaging has become a new battlefield. TSMC believes that the current 2D semiconductor scaling is no longer in line with the future heterogeneous integration needs, and its development of 3D semiconductor scaling has become a solution that can meet the future including system efficiency, reduction of area, and integration of different functions.
It is reported that TSMC’s 3D stack packaging technology can encapsulate different types of chips such as processors, memories, and sensors into one entity, which can make the chipset smaller, more powerful, and energy efficient.
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